In recent years, liquid crystal display devices and organic EL display devices are becoming widespread which include a thin film transistor (hereinafter “TFT”) for each pixel. TFTs are made by using the semiconductor layer formed on a substrate such as a glass substrate. A substrate on which TFTs are formed is referred to as an active matrix substrate.
Conventionally, TFTs using an amorphous silicon film as the active layer (hereinafter “amorphous silicon TFTs”) and TFTs using a polycrystalline silicon film as the active layer (hereinafter “polycrystalline silicon TFTs”) are widely used as TFTs.
Since the carrier mobility of a polycrystalline silicon film is higher than an amorphous silicon film, a polycrystalline silicon TFT has a higher ON current than an amorphous silicon TFT and is capable of high-speed operation. In view of this, display panels have been developed in which not only TFTs for pixels but also some or all of TFTs for peripheral circuits such as drivers are formed by polycrystalline silicon TFTs. Drivers thus formed on an insulative substrate (typically, a glass substrate) forming a display panel may be called monolithic drivers. Drivers include a gate driver and a source driver, and only one of these may be a monolithic driver. Herein, a display panel refers to a portion of a liquid crystal display device or an organic EL display device including a display region, and does not include a backlight, a bezel, or the like, of the liquid crystal display device.
The production of polycrystalline silicon TFTs requires complicated processes such as a thermal annealing process or an ion doping process as well as a laser crystallization process for crystallizing an amorphous silicon film. Thus, currently, polycrystalline silicon TFTs are used mainly in medium and small display devices, and amorphous silicon TFTs are used in large display devices.
In recent years, with increasing demands for increasing the image quality and reducing the power consumption in addition to increasing the size of display devices, proposals have been made (Patent Document No. 1, Patent Document No. 2 and Non-Patent Document No. 1) of TFTs using a micro-crystalline silicon (μc-Si) film as the active layer which have higher performance and lower manufacturing cost than amorphous silicon TFTs. Such a TFT is called a “micro-crystalline silicon TFT”.
A micro-crystalline silicon film is a silicon film having micro-crystal particles therein, and the grain boundaries of the micro-crystal particles are primarily in amorphous phase. That is, it is in a mixed state between crystalline phase of micro-crystal particles and amorphous phase. The size of each micro-crystal particle is smaller than that of each crystalline particle included in a polycrystalline silicon film. In a micro-crystalline silicon film, each micro-crystal particle has a columnar shape growing from the substrate surface, for example.
TFTs have been proposed which use a metal oxide semiconductor such as a Zn—O semiconductor (ZnO) film or an In—Ga—Zn—O semiconductor (IGZO) film, as a new material to replace silicon. Patent Document No. 3 states that it is possible, using a semiconductor layer of ZnO, to obtain a TFT having an ON/OFF current ratio of 4.5×105, a mobility of about 150 cm2/Vs, and a threshold value of about 1.3 V. This mobility is much higher than that of an amorphous silicon TFT. Non-Patent Document No. 2 states that by using a semiconductor layer of IGZO, it is possible to obtain a TFT having a mobility of about 5.6 to 8.0 cm2/Vs and a threshold value of about −6.6 to −9.9 V. Similarly, the mobility is higher than that of an amorphous silicon TFT.
Thus, with large display devices, there are cases in which some or all of TFTs for a peripheral circuit such as a driver are formed on an active matrix substrate, in addition to TFTs for pixels, using amorphous silicon, micro-crystal silicon, IGZO, etc.
On the other hand, an ESD (ElectroStatic Discharge) protection circuit is normally provided on an active matrix substrate in order to prevent electrostatic damage to elements, lines, etc.
FIG. 1 is a diagram showing an example of an ESD protection circuit provided for an IC internal circuit having a CMOS (Complementary Metal Oxide Semiconductor). The ESD protection circuit shown in FIG. 1 includes a protection resistor R formed between the input terminal and the CMOS, and two protection diodes D1 and D2 of opposite polarities. The protection diodes D1 and D2 are both connected to the input signal line of the CMOS.
With the ESD protection circuit, when an ESD surge enters the input terminal, the potential of the input terminal increases (+) or decreases (−). If it increases (+), the protection diode D1 is turned ON, thereby shunting the positive charge to the VCC line. If it decreases (−), the protection diode D2 is turned ON, thereby shunting the negative charge to the VSS line. The magnitude of the current flow is restricted by the protection resistor R.
Patent Document No. 4 discloses an active matrix substrate including a plurality of gate lines 401 and a plurality of drain lines 402 crossing each other, with a pixel thin film transistor 407 provided at each intersection, as shown in FIG. 2, wherein ESD protection diodes 404 are provided between a reference potential line 403, to which a reference potential is given, and the gate lines 401 and between the reference potential line 403 and the drain lines 402. The two diodes 404 are formed by using the same semiconductor film as the semiconductor layer of the pixel thin film transistor 407, and have a structure in which the source and the gate of a TFT are shorted together. Diodes having such a structure are referred to also as “TFT-type diodes”. The gate electrode of one of the two diodes 404 is connected to the gate line 401, and the gate electrode of the other is connected to the reference potential line 403. Therefore, whether the gate line 401 is charged positively or negatively with respect to the reference potential line 403, it is possible to provide a current flow between the gate line 401 and the reference potential line 403 in such a direction as to cancel out the charge. Therefore, it is possible to suppress the voltage between the gate line and the drain line caused by ESD, and to prevent the thin film transistor 407 from being damaged by an ESD surge.
While FIG. 2 shows the TFT-type diodes 404 for protecting the pixel thin film transistors 407, similar TFT-type diodes may be used for protecting circuit thin film transistors used in circuits such as driver circuits, for example.